@ARTICLE{10522947,
author={Tatar, Güner and Bayar, Salih and Çiçek, łhsan},
journal={IEEE Transactions on Intelligent Vehicles},
title={Real-Time Multi-Learning Deep Neural Network on an MPSoC-FPGA for Intelligent Vehicles: Harnessing Hardware Acceleration With Pipeline},
year={2024},
volume={},
number={},
pages={1-12},
keywords={Task analysis;Computational modeling;Intelligent vehicles;Optimization;Software;Real-time systems;Multitasking;Intelligent vehicles;advance driver assistance system;high performance computing;machine learning;deep learning;deep processing unit;MPSoC-FPGA},
doi={10.1109/TIV.2024.3398215}}
@ARTICLE{10504831,
author={Saglam, Serkan and Bayar, Salih},
journal={IEEE Access},
title={Hardware Design of Lightweight Binary Classification Algorithms for Small-Size Images on FPGA},
year={2024},
volume={12},
number={},
pages={57225-57235},
keywords={Field programmable gate arrays;Classification algorithms;Table lookup;Gray-scale;Convolutional neural networks;Machine learning algorithms;Hardware design languages;Binary image classification;convolutional neural network (CNN);decision tree;FPGA;hardware design;k-nearest neighborhood (k-NN)},
doi={10.1109/ACCESS.2024.3390564}}
@Article{Hangun2024,
author={Hangun, Batuhan
and Bayar, Salih},
title={An OpenMP-based parallel implementation of image enhancement technique for dark images},
journal={Signal, Image and Video Processing},
year={2024},
month={Mar},
day={04},
abstract={Image enhancement is frequently used to improve the input image's visual quality. Experts also utilize image enhancement as a preprocessing method rather than a complete solution in computer vision applications. In addition, consumers want to acquire digital images with good real-life contrast, which balances the number of pixels with darker and brighter intensity values. Unfortunately, acquired images become too dark or bright to inspect visually due to bad lighting or unwanted reflections. These undesired images may cause problems in applications such as medical imaging, satellite imagery, or UAV imaging. Therefore, this study introduces an image enhancement method using local and global enhancements to overcome the above-mentioned issues. Besides image quality, there is another problem with image processing applications, such as image size. As the image size gets larger, computers usually take much more time to complete the given task. Parallel computing is a method that takes advantage of several processing units on the same system using some libraries or APIs. Since it is easy to use and requires fewer sequential code changes, we preferred to use OpenMP in this study to parallelize sequential implementation. Although the proposed work is developed in C++ and is based on a small sample of dark images, the findings suggest that proposed parallel implementations can be very efficient and feasible in other programming languages for different types of image processing operations. Then, we compared the performance of both sequential and parallel implementations. Based on the experimental results, we observed that the proposed parallel implementation of the reference algorithm runs up to 38 times faster than the sequential version on a cloud computing platform with 48 physical cores.},
issn={1863-1711},
doi={10.1007/s11760-024-03058-8},
url={https://doi.org/10.1007/s11760-024-03058-8}
}
@ARTICLE{10198234,
author={Tatar, Guner and Bayar, Salih},
journal={IEEE Access},
title={Real-Time Multi-Task ADAS Implementation on Reconfigurable Heterogeneous MPSoC Architecture},
year={2023},
volume={11},
number={},
pages={80741-80760},
keywords={Task analysis;Multitasking;Field programmable gate arrays;Computer architecture;Computational modeling;Graphics processing units;Deep learning;Memory management;Artificial intelligence;Training;ADAS;deep learning;deep processing unit;memory allocation;multi-task learning;MPSoC-FPGA architecture;Vitis-AI;quantization aware training},
doi={10.1109/ACCESS.2023.3300379}}
@INPROCEEDINGS{10313150,
author={Tatar, Guner and Bayar, Salih and Cicek, Ihsan},
booktitle={2023 IEEE 17th International Conference on Application of Information and Communication Technologies (AICT)},
title={Performance Evaluation of Real-Time Video Processing Edge Detection on Various Platforms},
year={2023},
volume={},
number={},
pages={1-6},
keywords={Performance evaluation;Visualization;Laplace equations;Image edge detection;Streaming media;Real-time systems;Information and communication technology;Video processing;OpenCV;PYNQ-Z1 SoC;FPGA Vision;Overlay design;Pipeline architecture;Hardware accelerator},
doi={10.1109/AICT59525.2023.10313150}}
@INPROCEEDINGS{10013522,
author={Tatar, Guner and Bayar, Salih and Cicek, Ihsan},
booktitle={2022 IEEE 16th International Conference on Application of Information and Communication Technologies (AICT)},
title={Hardware Acceleration of FIR Filter Implementation on ZYNQ SoC},
year={2022},
volume={},
number={},
pages={1-6},
url= {https://ieeexplore.ieee.org/document/10013522},
doi={10.1109/AICT55583.2022.10013522}}
@INPROCEEDINGS{9894261,
author={Tatar, Guner and Bayar, Salih and Cicek, Ihsan},
booktitle={2022 International Conference on INnovations in Intelligent SysTems and Applications (INISTA)},
title={Performance Evaluation of Low-Precision Quantized LeNet and ConvNet Neural Networks},
year={2022},
volume={},
number={},
pages={1-6},
url= {https://ieeexplore.ieee.org/document/9894261},
doi={10.1109/INISTA55318.2022.9894261}}
@INPROCEEDINGS{9864856,
author={Mumcu, Muhammet Cihat and Çiçek, İhsan and Bayar, Salih},
booktitle={2022 30th Signal Processing and Communications Applications Conference (SIU)},
title={Performance Evaluation of Lightweight Cryptographic Algorithms on RISC-V},
year={2022},
volume={},
number={},
pages={1-4},
url= {https://ieeexplore.ieee.org/document/9864856},
doi={10.1109/SIU55565.2022.9864856}}
@article { ejt708805,
journal = {European Journal of Technique (EJT)},
issn = {2536-5010},
eissn = {2536-5134},
address = {INESEG Yayıncılık Dicle Üniversitesi Teknokent, Sur/Diyarbakır},
publisher = {Hibetullah KILIÇ},
year = {2020},
volume = {10},
pages = {322 - 330},
doi = {10.36222/ejt.708805},
title = {A FAST AND ENERGY EFFICIENT PARALLEL IMAGE FILTERING IMPLEMENTATION ON RASPBERRY PI'S GPU},
url={https://dergipark.org.tr/en/pub/ejt/issue/59168/708805}
key = {cite},
author = {Aytunç Polat and Salih Bayar}
}
@article { ejosat780115,
journal = {Avrupa Bilim ve Teknoloji Dergisi},
issn = {},
eissn = {2148-2683},
address = {},
publisher = {Osman SAĞDIÇ},
year = {2020},
volume = {},
pages = {352 - 359},
doi = {10.31590/ejosat.780115},
title = {Parallel Implementation of the GPR Techniques for Detecting and Mapping Ancient Buildings by Using CUDA},
url = {https://dergipark.org.tr/en/pub/ejosat/article/780115},
key = {cite},
author = {M. Cihat Mumcu and Salih Bayar}
}
@article{bayarjars20222,
author = {Billel Alla Eddine Bencharif and Salih Bayar and Erkan Ozkan},
title = {Parallel implementation of distributed acoustic sensor acquired signals: detection, processing and classification},
journal = {Journal of Applied Remote Sensing},
volume = {16},
number = {2},
pages = {024504-1--},
year = {2022},
url = {https://caps.luminad.com:8443/stockage/stock/SPIE/LDL-SPIE-JARS-210530/JARS-210530_online.pdf},
doi = {10.1117/1.JRS.16.024504.},
}
@article{tatar2021fpgaIIR,
doi = {10.31590/ejosat.951601},
url = {https://dergipark.org.tr/en/pub/ejosat/issue/62946/951601},
title={FPGA design of a fourth order elliptic IIR band-pass filter using LabVIEW},
author={Tatar, G{\"u}ner and {\c{C}}i{\c{c}}ek, {\.I}hsan and Bayar, Salih},
journal={Avrupa Bilim ve Teknoloji Dergisi},
volume = {16},
number={26},
pages={122--127},
year={2021}
}
@article{tatar2021fpgaFIR,
doi = {10.31590/ejosat.1016363},
url = {https://dergipark.org.tr/en/pub/ejosat/issue/65857/1016363},
title={FPGA Design of a High-Resolution FIR Band-Pass Filter by Using LabVIEW Environment},
author={Tatar, G{\"u}ner and Bayar, Salih and {\c{C}}i{\c{c}}ek, {\.I}hsan},
journal={Avrupa Bilim ve Teknoloji Dergisi},
volume = {16},
number={29},
pages={273--277},
year={2021}
}
@INPROCEEDINGS{8742406,
author = {Serkan Sağlam and Salih Bayar},
booktitle={2020 International Symposium on Fundamentals of Electrical Engineering (ISFEE)},
title={Effect of Different Threshold Levels for Binarization Method in Image Classification },
year={2020},
volume={},
number={},
pages={1-4},
keywords={},
doi={},
ISSN={},
month={Nov},}
@INPROCEEDINGS{8742406,
author={Etki G\"{u}r and Zekiye Eda Sataner and Yusuf H. Durkaya and Salih Bayar},
booktitle={2018 International Symposium on Fundamentals of Electrical Engineering (ISFEE)},
title={FPGA Implementation of 32-bit RISC-V Processor with Web-Based Assembler-Disassembler},
year={2018},
volume={},
number={},
pages={1-4},
keywords={Registers;Field programmable gate arrays;Computer architecture;Instruction sets;Hardware;Tools;Cyclones},
doi={10.1109/ISFEE.2018.8742406},
ISSN={},
month={Nov},}
@INPROCEEDINGS{8618830,
author={G\"{u}ner Tatar and
Salih Bayar},
booktitle={2018 International Symposium on Advanced Electrical and Communication Technologies (ISAECT)},
title={FPGA Based Bluetooth Controlled Land Vehicle},
year={2018},
volume={},
number={},
pages={1-6},
keywords={Bluetooth;cellular radio;field programmable gate arrays;hardware description languages;wireless LAN;Bluetooth controlled land vehicle;Android cell phone;Bluetooth module;remote control;field programmable gate arrays chip;Xilinx Web-Pack Vivado 18.1;Basys-3 FPGA;Bluetooth;Field programmable gate arrays;DC motors;Smart phones;Receivers;Land vehicles;Task analysis;Bluetooth;and remote information over a cell association. Android cell phones give access to an extensive variety of valuable libraries and apparatuses that can be utilized as a part of numerous applications. Also;the Bluetooth module is an open standard particular for a radio recurrence based;short-run network innovation. Remote control of this Bluetooth controlled land vehicle operates at a maximum baud rate of 54600 bps;FPGA;VHDL;Direct-Current (DC) Motors;Basys-3 board;Bluetooth module;Android smartphone},
doi={10.1109/ISAECT.2018.8618830},
ISSN={},
month={Nov},}
@inproceedings{conf/CNNAlgorithm/Bayar2019,
author = {Serkan Saglam and Fatih Tat and Salih Bayar},
title = {FPGA Implementation of CNN Algorithm for Detecting Malaria Diseased Blood Cells},
booktitle = {IEEE - International Symposium on Advanced Electrical and Communication Technologies, ISAECT 2019, 27-29 November 2019, Rome, Italy},
pages={1-5},
doi={10.1109/ISAECT47714.2019.9069724},
url={https://ieeexplore.ieee.org/document/9069724},
year = {2019},
}
@inproceedings{conf/SolarPanel/Bayar2019,
author = {G\"{u}ner Tatar and
Salih Bayar and Muhammet Alkan},
title = {FPGA Based Step Motor Control For Solar Panels},
booktitle = {13th International Conference on, Application of Information and Communication Technologies (AICT), 23-25 October 2019, Baku, Azebaijan},
pages={1-5},
doi={10.1109/AICT47866.2019.8981722},
url={https://ieeexplore.ieee.org/abstract/document/8981722},
year = {2019},
}
@inproceedings{conf/FaultDistance/Bayar2018,
author = {G\"{u}ner Tatar and Osman Kılıç and
Salih Bayar},
title = {FPGA Based Fault Distance Detection and Positioning of Underground Energy Cable by Using GSM / GPRS},
booktitle = {IEEE - International Symposium on Advanced Electrical and Communication Technologies, ISAECT 2019, 27-29 November 2019, Rome, Italy},
pages={1-6},
doi={10.1109/ISAECT47714.2019.9069726},
url={https://ieeexplore.ieee.org/abstract/document/9069726},
year = {2019},
}
@INPROCEEDINGS{8747029,
author={R{\i}za {\"{O}}z\c{c}elik and
Salih Bayar},
booktitle={2018 IEEE 12th International Conference on Application of Information and Communication Technologies (AICT)},
title={Outlier Detection Based on Majority Voting: A Case Study on Real Estate Prices},
year={2018},
volume={},
number={},
pages={1-4},
keywords={data analysis;property market;statistical analysis;Web sites;real estate prices;unusual behaviours;outlier candidates;outlier detection algorithms;real-estate sale Web site;price per meter-square value;data set;Anomaly detection;Solids;Standards;Crawlers;Heuristic algorithms;Credit cards;Sonar;Outlier Detection;Majority Voting},
doi={10.1109/ICAICT.2018.8747029},
ISSN={},
month={Oct},}
@article{DBLP:journals/vsd/Bayar2015,
author = {Salih Bayar and
Mehmet G{\"{o}}rkem {\"{U}}lkar},
title = {e-Defter ve e-Fatura Teknik Analizi: \"{O}rnek Bir Uygulama},
journal = {Vergi Sorunlar{\i} Dergisi (VSD)},
volume = {38},
number = {322},
pages = {102-110},
year = {2015},
url ={http://vergisorunlari.com.tr/makale/e-defter-ve-e-fatura-teknik-analizi-ornek-bir-uygulama/8007}
}
@inproceedings{conf/TBD31/Bayar2014,
author = {Mehmet G{\"{o}}rkem {\"{U}}lkar and
Salih Bayar},
title = {E-Defter Mizan Raporu Uygulamas{\i} Geli\c{s}tirme Deneyimleri},
booktitle = {TBD 31. Ulusal Bili\c{s}im Kurultay{\i} (Bili\c{s}im' 2014)},
pages = {ZZ},
url = {https://biltek.sanayi.gov.tr/Bilimsel%20almalarmz/9-E-Defter%20Mizan%20Raporu%20Uygulamas%C4%B1%20Geli%C5%9Ftirme%20Deneyimleri.pdf},
year = {2014}
}
@inproceedings{conf/UYMK/Bayar2016,
author = {Murat Cihan Sorkun and
Salih Bayar},
title = {Fault Tolerant Software Architecture applied on Embedded System using Dual Modular Redundancy},
booktitle = {National Software Architecture Conference (Ulusal Yaz{\i}l{\i}m Mimarisi Konferans{\i}, UYMK'2016), 5-6 September 2016, Istanbul, Turkey},
pages = {ZZ},
year = {2016},
}
@inproceedings{conf/AICT/Bayar2016,
author = {Salih Bayar},
title = {Performance Analysis of e-Archive Invoice Processing on Different Embedded Platforms},
booktitle = {10th International Conference on, Application of Information and Communication Technologies (AICT), 12-14 October 2016, Baku, Azebaijan},
pages = {ZZ},
year = {2016},
}
@inproceedings{conf/AB/Bayar2017_1,
author = {Can \"{O}zbey and
Salih Bayar},
title = {NoSQL Tabanl{\i}, Odakl{\i} \.{I}nternet Veri Toplama Servis Prototipi},
booktitle = {19. AKADEM\.{I}K B\.{I}L\.{I}\c{S}\.{I}M KONFERANSI, AB 2017, 8 - 10 \c{S}ubat 2017, Aksaray \"{U}niversitesi, Aksaray},
pages = {ZZ},
year = {2017},
url = {http://ab2017.aksaray.edu.tr/tr}
}
@inproceedings{conf/AB/Bayar2017_2,
author = {Can \"{O}zbey and
Salih Bayar},
title = {Otomatik Ses Tan{\i}ma: T\"{u}rk\c{c}e i\c{c}in Genel Da\u{g}arc{\i}kl{\i} Akustik Model Olu\c{s}turulmas{\i} ve Test Edilmesi},
booktitle = {19. AKADEM\.{I}K B\.{I}L\.{I}\c{S}\.{I}M KONFERANSI, AB 2017, 8 - 10 \c{S}ubat 2017, Aksaray \"{U}niversitesi, Aksaray},
pages = {ZZ},
year = {2017},
url = {http://ab2017.aksaray.edu.tr/tr}
}
@inproceedings{conf/AB/Bayar2016,
author = {\.{I}lknur G\"{u}r Nal\c{c}ac{\i} and
Salih Bayar},
title = {E-Defter Uygulamas{\i}nda \"{O}zg\"{u}n Adat Hesaplama Yaz{\i}l{\i}m{\i}},
booktitle = {XVIII. Akademik Bili\c{s}im Konferans{\i}, AB 2016, 30 Ocak - 5 \c{S}ubat 2016, Adnan Menderes \"{U}niversitesi, Ayd{\i}n},
pages = {ZZ},
year = {2016},
url = {http://ab.org.tr/ab16/ozet/245.html}
}
@inproceedings{conf/AB/Bayar2015,
author = {Salih Bayar and
Mehmet G{\"{o}}rkem {\"{U}}lkar and
R{\i}dvan S. Kuzu},
title = {E-Defter Finansal Raporlama Yaz{\i}l{\i}m{\i} ve Kar\c{s}{\i}la\c{s}{\i}lan Zorluklar},
booktitle = {XVII. Akademik Bili\c{s}im Konferans{\i}, AB 2015, 4 - 6 \c{S}ubat 2015, Anadolu \"{U}niversitesi, Eski\c{s}ehir},
pages = {ZZ},
year = {2015},
url ={https://biltek.sanayi.gov.tr/Bilimsel%20almalarmz/11-E-Defter%20Finansal%20Raporlama%20Yazilimi%20ve%20Karsilasilan%20Zorluklar.pdf}
}
Salih Bayar, M. Görkem Ülkar ve Rıdvan S. Kuzu, "E-Defter Finansal Raporlama Yazılımı ve Karşılaşılan Zorluklar," XVII. AKADEMİK BİLİŞİM KONFERANSI, AB 2015, 4-6 Şubat 2015, Anadolu Üniversitesi, Eskişehir
@inproceedings{conf/Gomsis/Bayar2010,
author = {Salih Bayar and
Arda Yurdakul},
title = {G\"{o}m\"{u}l\"{u} \c{C}oklu \.{I}\c{s}lemcili Sistemlerde Yeniden Betimlenebilir Haberle\c{s}me Protokolleri},
booktitle = {2. G\"{o}m\"{u}l\"{u} Sistemler ve Uygulamalar{\i} Sempozyumu, 4-5 Kas{\i}m, 2010, Istanbul, T\"{u}rkiye},
pages = {ZZ},
year = {2010},
url = {http://www.cmpe.boun.edu.tr/~bayar/gomsis_2010_MTT.pdf}
}
@inproceedings{conf/DTIS/Bayar2016,
author = {Salih Bayar and
Arda Yurdakul},
title = {An Efficient Mapping Algorithm on 2-D Mesh Network-on-Chip with Reconfigurable Switches},
booktitle = {11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, April 12-14, 2016, Istanbul, Turkey},
pages = {1--4},
year = {2016},
url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7483808}
}
@inproceedings{DBLP:conf/dsd/YantirBY13,
author = {Hasan Erdem Yant{\i}r and
Salih Bayar and
Arda Yurdakul},
title = {Efficient Implementations of Multi-pumped Multi-port Register Files
in FPGAs},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {185--192},
year = {2013},
crossref = {DBLP:conf/dsd/2013},
url = {http://dx.doi.org/10.1109/DSD.2013.28},
doi = {10.1109/DSD.2013.28},
timestamp = {Fri, 16 Jan 2015 15:08:28 +0100},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/dsd/YantirBY13},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@INPROCEEDINGS{7338555,
author = {Burcin Camci and
Salih Bayar and
Mehmet G{\"{o}}rkem {\"{U}}lkar},
booktitle={Application of Information and Communication Technologies (AICT), 2015 9th International Conference on},
title={A simple auditing mechanism for financial reports in e-Ledger project},
year={2015},
pages={244-248},
keywords={auditing;financial data processing;Turkish revenue administration;e-Ledger project;financial reports;huge-sized ledgers;simple auditing mechanism;technical regulations;Cascading style sheets;Companies;Computers;HTML;Transforms;XML;Balance-Sheet;HTML;Income Table;Schematron;Trial Balance;XML;XSD;XSLT;e-Ledger},
doi={10.1109/ICAICT.2015.7338555},
month={Oct},
url={http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=7338555&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Ficp.jsp%3Farnumber%3D7338555}
}
@MastersThesis{Bayar:MSThesis:2007,
author = {Salih Bayar},
title = {Implementation, testing and evaluation of methods for reducing the power dissipation by utilizing the dynamic and partial reconfiguration for Xilinx Spartan III FPGAs (in German)},
organization = {Department of Computer Science and Engineering},
school = {Karlsruhe Institute of Technology (KIT)},
address = {Germany},
pages = {XX},
year = {2007},
month = {January},
url = {https://www.itiv.kit.edu/english/1510.php}
}
@phdThesis{Bayar:PHDThesis:2015,
author = {Salih Bayar},
title = {Reconfigurable Network-On-Chip (Noc) Architectures for Embedded Systems},
organization = {Department of Computer Engineering},
school = {Bogazici University},
address = {Turkey},
year = {2015},
month = {March},
abstract ={Communication architectures such as Point-to-Point (P2P) and shared bus are poorly scalable as the number of cores or the communication volume increase. Network-on-Chip (NoC) has been proposed to reduce power consumption and has been widely adopted by the System-on-Chip (SoC) community. Yet, NoCs occupy more area and consume more power as the size of network increases. In this thesis, we propose a novel dynamic reconfigurable P2P (DRP2P) communication architecture for reconfigurable embedded systems, which is an alternative to the conventional NoC architectures. In DRP2P, interconnects are reconfigured on-the-fly as new communication requests arrive at the system. In embedded applications running on the multi-core systems, the traffic flow is usually known. Hence, DRP2P is very suitable for embedded systems. DRP2P is inspired from both P2P interconnects and NoC architecture. If the traffic flow is known in advance, it works as fast as P2P while reconfiguration process is done at the time of computation. Thus, next communication scenario can be established before communication starts. Since the reconfigurable wiring area in DRP2P is proportional to the network size, it is as scalable as NoC. In order to achieve reconfiguration efficiently, we developed three different dedicated self reconfiguration engines. The latest version of these engines is exploited in DRP2P architecture. DRP2P gives better results than conventional NoCs if the physical placement of cores on the embedded system is done properly by utilizing mapping and routing algorithms. Hence, fast and heuristic mapping and routing algorithms are also designed in the scope of this thesis. Experimental evaluations have shown that DRP2P outperforms conventional NoCs even in the worst case scenario as the amount of data in on-chip communication increases.},
url = {http://www.salihbayar.com/pdf/PhD_Thesis_Salih_Bayar_Bogazici_University_Turkey_2015.pdf}
}
@INPROCEEDINGS{4595744,
author={Salih Bayar and
Arda Yurdakul},
booktitle={Research in Microelectronics and Electronics, 2008. PRIME 2008. Ph.D.},
title={Self-reconfiguration on Spartan-III FPGAs with compressed partial bitstreams via a parallel configuration access port (cPCAP) core},
year={2008},
pages={137-140},
keywords={field programmable gate arrays;random-access storage;Spartan-III FPGA;Xilinx;bitstream decompression module;blockRAM;compressed partial bitstream;dynamic partial self-reconfiguration;embedded processor;field programmable gate array;parallel configuration access port;Clocks;Concurrent computing;Embedded computing;Field programmable gate arrays;Ground penetrating radar;Hardware;Intelligent agent;Pins;Programmable logic devices;Runtime},
doi={10.1109/RME.2008.4595744},
month={June},
url={http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4595744&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D4595744}
}
@INPROCEEDINGS{conf/hipeac/2008,
author={Salih Bayar and
Arda Yurdakul},
booktitle={Proceedings of HiPEAC Workshop on Reconfigurable Computing, January 27, 2008, Goteborg, Sweden.},
title={Dynamic Partial Self-Reconfiguration on Spartan-III FPGAs via a Parallel Configuration Access Port (PCAP)},
year={2008},
pages={XX},
keywords={field programmable gate arrays;random-access storage;Spartan-III FPGA;Xilinx;bitstream decompression module;blockRAM;compressed partial bitstream;dynamic partial self-reconfiguration;embedded processor;field programmable gate array;parallel configuration access port;Clocks;Concurrent computing;Embedded computing;Field programmable gate arrays;Ground penetrating radar;Hardware;Intelligent agent;Pins;Programmable logic devices;Runtime},
month={January},
url={http://www.cmpe.boun.edu.tr/~yurdakul/publications/BayarWRC08.pdf}
}
@article{DBLP:journals/jsa/BayarY12,
author = {Salih Bayar and
Arda Yurdakul},
title = {A dynamically reconfigurable communication architecture for multicore
embedded systems},
journal = {Journal of Systems Architecture - Embedded Systems Design},
volume = {58},
number = {3-4},
pages = {140--159},
year = {2012},
url = {http://dx.doi.org/10.1016/j.sysarc.2012.02.003},
doi = {10.1016/j.sysarc.2012.02.003},
timestamp = {Sat, 23 Jun 2012 13:53:42 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/journals/jsa/BayarY12},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/BayarTY11,
author = {Salih Bayar and
Mehmet T{\"{u}}kel and
Arda Yurdakul},
title = {A self-reconfigurable platform for general purpose image processing
systems on low-cost spartan-6 FPGAs},
booktitle = {Proceedings of the 6th International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011},
pages = {1--9},
year = {2011},
crossref = {DBLP:conf/recosoc/2011},
url = {http://dx.doi.org/10.1109/ReCoSoC.2011.5981513},
doi = {10.1109/ReCoSoC.2011.5981513},
timestamp = {Wed, 07 Sep 2011 17:15:37 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/recosoc/BayarTY11},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/PaulssonHBB07,
author = {Katarina Paulsson and
Michael H{\"{u}}bner and
Salih Bayar and
J{\"{u}}rgen Becker},
title = {Exploitation of Run-Time Partial Reconfiguration for Dynamic Power
Management in Xilinx Spartan III-based Systems},
booktitle = {Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007},
pages = {1--6},
year = {2007},
crossref = {DBLP:conf/recosoc/2007},
timestamp = {Fri, 05 Oct 2007 11:47:31 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/recosoc/PaulssonHBB07},
bibsource = {dblp computer science bibliography, http://dblp.org},
url={http://www.cmpe.boun.edu.tr/~bayar/recosoc_07_Bayar_Paulsson.pdf}
}
@article{DBLP:journals/tvlsi/BayarY15,
author = {Salih Bayar and
Arda Yurdakul},
title = {{PFMAP:} Exploitation of Particle Filters for Network-on-Chip Mapping},
journal = {{IEEE} Trans. {VLSI} Syst.},
volume = {23},
number = {10},
pages = {2116--2127},
year = {2015},
url = {http://dx.doi.org/10.1109/TVLSI.2014.2360791},
doi = {10.1109/TVLSI.2014.2360791},
timestamp = {Tue, 29 Sep 2015 14:49:46 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/journals/tvlsi/BayarY15},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@inproceedings{DBLP:conf/uyms/BayarUS15,
author = {Salih Bayar and
Mehmet G{\"{o}}rkem {\"{U}}lkar and
Alper Sen},
title = {Kullan{\i}c{\i} Taraf{\i}nda e-Belge Olu{\c{s}}turma ve Yazd{\i}rma
Yaz{\i}l{\i}m Deneyimleri},
booktitle = {Proceedings of the 9th Turkish National Software Engineering Symposium,
Yasar University, Izmir, Turkey, September, 9-11, 2015.},
year = {2015},
crossref = {DBLP:conf/uyms/2015},
url = {http://ceur-ws.org/Vol-1483/38_Deneyim.pdf},
timestamp = {Tue, 26 Jan 2016 15:43:04 +0100},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/uyms/BayarUS15},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@inproceedings{uyms/XSLT_Bayar2016,
author = {Salih Bayar and
M. Yasin Akp{\i}nar},
title = {E-Fatura Yap{\i}sal ve Anlamsal Kontrol Yaz{\i}l{\i}m{\i}n{\i}n Performans Analizi},
booktitle = {10th Turkish National Software Engineering Symposium, \c{C}anakkale, Turkey, October, 24-26, 2016.},
year = {2016},
pages = {ZZ},
}
@inproceedings{uyms/DIARIST_Bayar2016,
author = {Salih Bayar and
Alper Sen},
title = {e-Ar\c{s}iv Fatura i\c{c}in Aksakl{\i}\u{g}a Dayan{\i}kl{\i} Da\u{g}{\i}t{\i}k bir Sistem Tasar{\i}m{\i}},
booktitle = {10th Turkish National Software Engineering Symposium, \c{C}anakkale, Turkey, October, 24-26, 2016.},
year = {2016},
pages = {ZZ},
}
@inproceedings{DBLP:conf/uyms/BayarUT15,
author = {Salih Bayar and Mehmet G\"{o}rkem \"{U}lkar and Yal\c{c}{\i}n Tercan},
title = {E-Belge Uyum Yaz{\i}l{\i}m{\i} Deneyimleri},
booktitle = {Proceedings of the 9th Turkish National Software Engineering Symposium,
Yasar University, Izmir, Turkey, September, 9-11, 2015.},
year = {2015},
crossref = {DBLP:conf/uyms/2015},
url = {http://ceur-ws.org/Vol-1483/20_Bildiri.pdf},
timestamp = {Tue, 26 Jan 2016 15:43:04 +0100},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/uyms/BayarUT15},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@inproceedings{DBLP:conf/uyms/UlkarB14,
author = {Mehmet G\"{o}rkem \"{U}lkar and
Salih Bayar},
title = {E-Defter Uygulamas{\i} Kapsam{\i}nda {\c{C}}ok Bile{\c{s}}enli Finansal
Raporlama Yaz{\i}l{\i}m{\i} Geli{\c{s}}tirme Deneyimleri},
booktitle = {Proceedings of the 8th Turkish National Software Engineering Symposium,
G{\"{u}}zelyurt, KKTC, Turkey, September 8-10, 2014.},
year = {2014},
crossref = {DBLP:conf/uyms/2014},
url = {http://ceur-ws.org/Vol-1221/77_Deneyim.pdf},
timestamp = {Tue, 23 Sep 2014 11:25:18 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/uyms/UlkarB14},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
@inproceedings{conf/AB2015/BayarEFatura,
author = {Salih Bayar and Mehmet G\"{o}rkem \"{U}lkar and
Ugur Dogan},
title = {T{\"{u}}rkiye'de ve Avrupa'da E-Fatura Uygulamas{\i}},
booktitle = {XVII. Akademik Bili\c{s}im Konferans{\i}, AB 2015, 4 - 6 \c{S}ubat 2015, Anadolu \"{U}niversitesi, Eski\c{s}ehir},
year = {2015},
url={https://biltek.sanayi.gov.tr/Bilimsel%20almalarmz/10-Turkiyede%20ve%20Avrupada%20E-Fatura%20Uygulamasi.pdf}
}